1. Field of the Invention
The present invention relates to a programmable logic device and a method of manufacturing the programmable logic device, and more particularly, to a non-volatile programmable device included in a programmable logic device and a method of manufacturing the non-volatile programmable device.
2. Description of the Related Art
A programmable logic device (PLD), such as a field-programmable gate array (FPGA), a programmable logic array (PLA), a programmable array logic (PAL), a complex programmable logic device (CPLD), and so forth, is an electronic component which is manufactured with no fixed function but obtains a particular function according to programming by a user. In particular, due to continuous improvement of the performance and the reduced manufacturing costs of the PLD, FPGAs are widely used in digital devices such as plasma display panels (PDPs) or liquid crystal display televisions (LCD TVs) or portable devices such as camcorders and Blue-ray disks.
FIG. 1 is a block diagram illustrating a general PLD 200.
In detail, the general PLD 200 includes a logic block 220, a programmable switch device 210, and interconnect wires 230. The PLD 200 includes the programmable switch device 210 that connects the logic block 220 to the interconnect wires 230 or connects the interconnect wires 230 according to programming by a user. Examples of the programmable switch device 210 include a fuse, an erasable programmable read-only memory (EPROM), an electrically erasable programmable read-only memory (EEPROM), a static random access memory (SRAM), a flash memory, etc.
FIG. 2 is a circuit diagram illustrating a programmable logic device in which a SRAM 210 is used as a programmable switch device, according to the prior art.
In detail, the SRAM 210a corresponds to a switch device 210 in programmable logic devices 200 of FIG. 1. That is, the SRAM 210a function as a switch device 210 that turns on and off between programmable logic devices 200 by controlling a gate node of a pass transistor. The SRAM 210a has a high erasing and writing speed, and is manufactured using a well-established CMOS process, and thus, can be designed easily. However, the SRAM 210a is volatile and thus requires an additional external memory when powering up. The additional external memory is vulnerable in regard to data protection because data therein can be easily read. In addition, when the SRAM 210a is used as a programmable switch device 210, data change errors or failure in a circuit may occur due to radiation by heavy ions or high-energy protons.
FIG. 3 is a circuit diagram illustrating a programmable logic device in which a flash memory 210b is used as a programmable switch device according to the prior art.
In detail, the flash memory 210b corresponds to a switch device 210 in programmable logic devices 200 of FIG. 1. That is, when the flash memory 210b operates as a switch device 210 to turn on and off between programmable logic devices 200 by controlling a gate node of a pass transistor. The flash memory 210b is non-volatile, and is formed of two transistors as illustrated in FIG. 3, and thus, a surface area of the flash memory 210b is smaller than that of the SRAM 210a. 
However, the flash memory 210b has poorer operation frequency characteristics than the SRAM 210a and is manufactured with a different process than a standard CMOS process. In addition, when a flash memory 210b is used as a switch 210, data change errors or failure in a circuit may occur due to radiation by heavy ions or high-energy protons.